The electronics industry continues to rely upon advances in semiconductor technology, including integrated circuits, to realize higher-functioning devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon wafer. In addition, many of the individual devices within the wafer are being manufactured with smaller physical dimensions. As the number of electronic devices per given area of the silicon wafer increases, and as the size of the individual devices decreases, testing processes become more important and more difficult.
Many defects in integrated circuits can recover or fail at higher temperatures. For instance, circuit sites exhibiting temperature sensitive defects, such as charge trapping and ionic contamination, can recover when heated. Traditionally, isolation of defective sites has been attempted by heating the entire device during extensive electrical testing. Such electrical testing, however, does not always work. Moreover, even if a unique node is electrically identified, the physical defective site usually cannot be identified.
Semiconductor technology would benefit from a practical method and apparatus for heat testing integrated circuits for isolation of defective sites.